1. Field of the Invention
The present invention relates to a method for forming the isolation regions among devices on a semiconductor substrate, and more particularly to a method for forming the field isolation structure with the minimized impurity encroachment effect.
2. Description of the Prior Art
The art of isolating devices that are built on a semiconductor substrate becomes one important aspect of modem metal-oxide-semiconductor (MOS) and bipolar integrated circuit technology as many as hundreds of thousands of devices are used in a single chip. Improper isolation among transistors will cause current leakages, which can consume significant power for the entire chip. In addition, improper isolation can further escalate latchup to damage the circuit function momentarily or permanently. Still further, improper isolation can result in noise margin degradation, voltage shift or crosstalk. In complementary MOS (CMOS) technology, adequate isolation provided between opposite-type transistors is important as well as between same-type transistors.
In MOS technology, isolation is usually practiced by forming the isolation regions between neighboring active regions. Typically, an isolation region is formed by ion-doping a channel stop of polarity opposite to the source electrode and the drain electrode of the integrated circuit device, and growing a thick oxide, often referred to as field oxide (FOX). The channel stop and the FOX cause the threshold voltage in the isolation region to be much higher than those of the neighboring active devices, making surface inversion not occur under the field oxide region.
The conventional LOCOS (LOCal Oxidation of Silicon) process is used to develop regions which laterally isolate the active devices on the integrated circuits. The LOCOS structure is typically formed by using a patterned silicon nitride layer together with a pad oxide, which is utilized to release stress caused by the silicon nitride layer, underneath to mask the active regions, followed by ion-implantation in the isolation region and then growing a thick field oxide locally. Another structure similar to the LOCOS is the Buffered Polysilicon LOCOS (BPL) isolation process, which uses a sandwich of a pad oxide having thereon a polysilicon layer, and a silicon nitride layer on the polysilicon layer.
Both structures mentioned above possess some inherent drawbacks resulting from the processes, i.e., lateral oxidation of the silicon underneath the silicon nitride mask, making the edge of the field oxide resemble a bird's beak, and the lateral diffusion of channel-stop dopants, making the dopants encroach into the active device regions. Both effects overtake the active device regions, making the physical channel width less than the desired channel width. The reduced portion overtaken by both effects will make the situation even worse when devices are scaled down for very large scale integration (VLSI) implementation, increasing threshold voltage and reducing the current driving capability. Furthermore, p-channel devices and n-channel devices in CMOS process require extra steps strictly to achieve the isolation between the opposite-type devices as well as between the same-type devices.
Several methods in the prior art have been designed for improving LOCOS or BPL isolation processes to minimize the transition regions between active areas. For example, the side wall masked isolation (SWAMI) process has been proposed which involves the addition of a second silicon nitride layer on the side wall. The SWAMI offers basically near-zero bird's beak, but at the expense of process complexity. Another method in the prior art is the sealed-interface local oxidation (SILO) process which uses three layers of a silicon nitride over the silicon substrate followed by an oxide layer and a cap silicon nitride layer. The SILO can reduce the bird's beak, but at the expense of generating more stress, more crystal defects, and higher leakage currents. Also, the buried oxide (BOX) process has been devised which uses an aluminum mask to etch a silicon groove and the subsequent removal of a plasma deposited silicon dioxide layer. The BOX process can reduce the bird's beak but, however, at the expense of manufacture complexity. Although numerous techniques have been devised for improving the LOCOS or the BPL isolation process to minimize bird's beak effect, none of these effectively overcomes the dopant encroachment problems.